In conventional multi-chip stacked packages, a plurality of semiconductor chips are individually and vertically stacked on a substrate with the active surfaces of the chips facing upward. The chips are electrically connected to the substrate through a plurality of bonding wires formed by wire bonding process. However, the thickness of the conventional multi-chip stacked package includes the substrate thickness and the encapsulation thickness, the encapsulation thickness being greater than the loop height of the bonding wires. In this way, the package thickness are not effectively reduced, especially for some conventional packages having longer and higher bonding wires which are vulnerable to wire sweeping leading to electrical short during the deposition of the encapsulant.